Thermal Image of a person holding a hot coffee captured by Lepton 3.5 IR sensor
To transfer the sensor data with a minimum of software or hardware, FLIR has developed the VoSPI protocol, an SPI based Video Interface. BitSim has developed an FPGA IP, Bit-VoSPI Rx, to receive the VoSPI data.
This IP implements custom logic to receive the data through an SPI interface, extract the video data and send the data out through an AXI4-Stream interface. This IP is configurable to different resolutions, easy to instantiate in FPGA designs.
In combination with another BitSim IP, the Bit-MIPI CSI-2 Tx (MIPI CSI-2 transmitter), the received IR-data can be streamed to popular SoCs like i.MX8, Jetson/Xavier, Snapdragon and others, since they demand to use their MIPI CSI-2 receiver interface when using the embedded ISP engine.
A V4L SW-driver for the i.MX8 is included for configuring its MIPI CSI-2 receiver.
The VoSPI IP has been tested on Xilinx and Microchip FPGA platforms, and the i.MX8 SoC from NXP on a Variscite board.
To read more about BitSim IPs: https://bitsimnow.com/ip-block/
To read more about the Linux driver SW for the VoSPI IP: https://bitsimnow.com/fpga/ir-sensor-linux-v4l-sw-driver-vospi/
To read more about MIPI: https://mipi.org/specifications/camera-and-imaging
To read more about VoSPI: https://media.digikey.com/pdf/Data%20Sheets/FLIR%20PDFs/VoSPI_Implementation_Spec_Rev007_Sep9_2013.pdf
